ADT7476A
http://onsemi.com
19
Single-channel ADC Conversions
Setting Bit 6 of Configuration Register 2 (0x73) places
the ADT7476A into single-channel ADC conversion mode.
In this mode, the ADT7476A can be made to read a single
temperature channel only. The appropriate ADC channel is
selected by writing to Bits [7:5] of the TACH1 minimum
high byte register (0x55).
Table 22. PROGRAMMING SINGLE-CHANNEL ADC
MODE FOR TEMPERATURES
Bits [7:5], Register 0x55
Channel Selected
101
Remote 1 Temperature
110
Local Temperature
111
Remote 2 Temperature
Table 23. CONFIGURATION REGISTER 2 (REG. 0x73)
Bit
Description
[4]
1: Averaging Off
[6]
1: Single-channel Convert Mode
TACH1 Minimum High Byte (0x55)
[7:5] selects ADC channel for single-channel convert mode.
Overtemperature Events
Overtemperature events on any of the temperature
channels can be detected and dealt with automatically in
automatic fan speed control mode. Register 0x6A to
Register 0x6C are the THERM
temperature limits. When a
temperature exceeds its THERM
temperature limit, all
PWM outputs run at the maximum PWM duty cycle
(Register 0x38, Register 0x39, and Register 0x3A).
This effectively runs the fans at the fastest allowed speed.
The fans run at this speed until the temperature drops
below THERM
minus hysteresis. This can be disabled by
setting Bit 2, the boost bit, in Configuration Register 3
(0x78). The hysteresis value for the THERM
temperature
limit is the value programmed into the hysteresis registers
(0x6D and 0x6E). The default hysteresis value is 4癈.
Figure 28. THERM
Temperature Limit Operation
THERM
LIMIT
TEMPERATURE
FANS
100%
HYSTERESIS (癈)
THERM
can be disabled on specific temperature channels
using Bits [7:5] of Configuration Register 5 (0x7C).
THERM
can also be disabled by:
?SPAN class="pst ADT7476AARQZ-R_2298076_3"> Writing 64?/SPAN>C to the appropriate THERM
temperature
limit in Offset 64 mode.
?SPAN class="pst ADT7476AARQZ-R_2298076_3"> Writing 128?/SPAN>C to the appropriate THERM
temperature limit in twos complement mode.
Limits, Status Registers, and Interrupts
Limit Values
Associated with each measurement channel on the
ADT7476A are high and low limits. These can form the
basis of system status monitoring; a status bit can be set for
any out-of-limit condition and is detected by polling the
device. Alternatively, SMBALERT
interrupts can be
generated to flag out-of-limit conditions to a processor
or microcontroller.
8-bit Limits
The following is a list of 8-bit limits on the ADT7476A.
Table 24. VOLTAGE LIMIT REGISTERS
Register
Description
Default
0x44
2.5 V Low Limit
0x00
0x45
2.5 V High Limit
0xFF
0x46
V
CCP
Low Limit
0x00
0x47
V
CCP
High Limit
0xFF
0x48
V
CC
Low Limit
0x00
0x49
V
CC
High Limit
0xFF
0x4A
5.0 V Low Limit
0x00
0x4B
5.0 V High Limit
0xFF
0x4C
12 V Low Limit
0x00
0x4D
12 V High Limit
0xFF
Table 25. TEMPERATURE LIMIT REGISTERS
Register
Description
Default
0x4E
Remote 1 Temperature Low Limit
0x81
0x4F
Remote 1 Temperature High Limit
0x7F
0x6A
Remote 1 THERM
Temp. Limit
0x64
0x50
Local Temperature Low Limit
0x81
0x51
Local Temperature High Limit
0x7F
0x6B
Local THERM
Temperature Limit
0x64
0x52
Remote 2 Temperature Low Limit
0x81
0x53
Remote 2 Temperature High Limit
0x7F
0x6C
Remote 2 THERM
Temp. Limit
0x64
Table 26. THERM
TIMER LIMIT REGISTER
Register
Description
Default
0x7A
THERM
Timer Limit
0x00
16-bit Limits
The fan TACH measurements are 16-bit results. The fan
TACH limits are also 16 bits, consisting of a high byte and
low byte. Because fans running under speed or stalled are
normally the only conditions of interest, only high limits
exist for fan TACHs. Because the fan TACH period is
actually being measured, exceeding the limit indicates a
slow or stalled fan.
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